Pyramidal structure formation at the interface between III/V semiconductors and silicon

A. Beyer, A. Stegmüller, J. O. Oelerich, K. Jandieri, K. Werner, G. Mette, W. Stolz, S. D. Baranovskii, R. Tonner, K. Volz
Chemistry of Materials 28 (2016) 3265

Modern semiconductor devices, as found in cell phones, personal computers or solar cells are commonly based on silicon. However, the last years have shown that computing speed ceases to experience significant increase and efficiency gain for conventional solar cells is slowing. This is due to the fact that the silicon-based technique reaches several fundamental limits, e.g., the tunneling of electrons through nanometer-sized device structures. To overcome these physical limits, silicon can be coated with other materials. III/V-semiconductors, which consist of elements of the third and fifth group of the periodic table (group 13 and 15 in chemical science nomenclature), are well suited for this task. However, the combination of these two material classes holds several challenges. The foremost challenge is finding materials with the same lattice constant as silicon, since this leads to more stable devices.

III/V-semiconductors with the same lattice constant as silicon have been observed. However, they still differ from silicon in other important properties, especially in their polarity, which may lead to defects forming at the interface between the two materials and the accumulation of undesired charges, which limit the functionality of the device.

Atomically resolved STEM (scanning transmission electron microscopy) images of the GaP/Si interface region in [110] viewing direction (a). The occupancy of each atomic column with Si is plotted in (b).

To find a solution to this challenge, the model system of galliumphosphide (GaP) on Si was investigated by several groups in Marburg. State of the art aberration-corrected electron microscopy was used to determine the structure at the interface at unprecedented atomic resolution, revealing that the actual interface between GaP and Si is not perfectly flat but exhibits a distinct structure across several layers of intermixing. Quantitative modelling of the electron scattering process taking place within the microscope, showed that the interface between the silicon substrate and the III/V-semiconductor exhibits this pyramidal morphology despite the initial silicon surface clearly having been atomically flat prior to GaP growth.

This pyramidal interface morphology is an intrinsic feature of combining these two materials in a sense that this structure was observed in samples grown under markedly different conditions. Theoretical modelling taking kinetic and thermodynamic processes into account has helped to understand the processes leading to this structured interface. Density functional theory explains that the pyramidally shaped interface structure is energetically favorable over an abrupt flat interface as local charges are better compensated for in structured interfaces. Moreover, a kinetic driving force based on diffusion in the growth process was found, which results in the intermixing. In consequence, this structural formation at the interface appears to be a general feature which needs to be considered for all III/V materials grown on silicon. At the same time, the results gained promise to open up new possibilities for future intentional altering of the interface structure, opening up a pathway to increasing the efficiency of existing devices or even developing novel ones.

Silicon surfaces prior to and after GaP deposition as obtained from the KMC (Kinetic Monte Carlo) simulation. Similar to the experiment, the Si surface after Si deposition in the KMC simulation is atomically flat (a). After GaP deposition, a structured Si interface is obtained (b) (the Ga and P atoms are not shown in the picture for clarity), which exhibits a highly structured morphology, similar to the interface structure observed experimentally.